Tag: interrupts
5 matching upgrades
Showing 5 products.
| Status | Product | What it does | Compatibility | Links |
|---|---|---|---|---|
| AvailableChecked Jul 24, 2026 | Quazar SID Interfaceby Quazar | Connects an original or modern replacement SID module to an RC2014. No SID is included in the base module, although the current listing offers a SwinSID option and a separate 8580 adapter. The main socket directly supports a 6581, SwinSID variants, and ARMSID; an 8580 requires the adapter. |
| Vendor product page |
| Build itChecked Jul 24, 2026 | SC717 Z80 PIO Moduleby Small Computer Central | Adds 16 programmable parallel I/O lines and four handshake lines through a Z80 PIO. The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. On PCB v1.0.0, JP2 and JP3 are tight against the P2 box header; the assembly guide recommends filing a little plastic from those headers before soldering. Sources |
| Official project page |
| Build itChecked Jul 24, 2026 | SC718 Z80 CTC Moduleby Small Computer Central | Adds four programmable counter and timer channels with frequency and interrupt generation. The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The optional onboard oscillator is not included in the kit. Mode 2 interrupt chaining needs suitable backplane support or flying leads. Sources |
| Official project page |
| Build itChecked Jul 24, 2026 | SC725 Serial and Timer Moduleby Small Computer Central | Combines two Z80 SIO/2 serial ports with four programmable Z80 CTC channels. The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The optional oscillator is not included in the kit. Standard RomWBW does not enable CTC support, so its documented jumper setup bypasses the CTC and assumes a 7.3728 MHz CPU clock. |
| Official project page |
| Build itChecked Jul 24, 2026 | SC737 50 Hz Interrupt Moduleby Small Computer Central | Adds a software-enabled 50 Hz system tick interrupt. The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. Interrupt generation is disabled at reset. A jumper routes the signal to /INT, /INT1, or /INT2 where the chosen bus exposes it. Sources |
| Official project page |