Tag: rcbus

Adds a two-drive floppy controller and DS1302 real-time clock to RC2014 and RCBus systems.

Tindie listed the complete Flock V2 kit without an out-of-stock notice on 2026-07-25, and open build files remain available. The CR2032 battery and optional 300 Kbit/s parts are not included. The drive-power output is unfused; avoid overloading or shorting it.

Combines a working Z80 or Z180 computer with RC2014-compatible expansion sockets on one buildable motherboard.

The official pages listed complete-kit and bare-PCB suppliers on 2026-07-27, but no assembled and tested option. Exact inventory varies by model and supplier; the Tindie seller was temporarily on a break when checked. Each board still needs assembly plus the documented power, terminal, and storage accessories.

Builds complete RomWBW and CP/M computers from matched 40-pin or 80-pin RCBus backplanes and modules.

The official pages listed complete-kit and bare-PCB suppliers on 2026-07-27, but no assembled and tested option. Exact inventory varies by model and supplier. A suitable power supply, storage card, USB serial adapter, terminal computer, and assembly tools may be required as specified for each model.

Add supervised 5 V power, manual reset, and power-on reset to an RCBus system.

The projects provide schematics, Gerbers, PCB design files, and kit or bare-PCB suppliers; assembled versions are not offered. SC712 requires a regulated 4.75 V to 5.25 V input. SC703's linear regulator can run hot at higher input voltages and loads. Enable only one voltage supervisor in a system.

Adds a software-driven I2C master interface to RC2014 and RCBus systems.

The project supplies a schematic, Gerbers, PCB design files, and links for kits and bare PCBs; an assembled version is not offered. On PCB v1.0.0, the example I2C read and write address labels are reversed: read starts at 0xA1 and write starts at 0xA0.

Adds a clock-stable 68B50 serial port with TTL-level flow control.

The project provides a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. The serial-header power jumper must not connect two competing 5 V sources. Multiple SC705 modules require distinct I/O addresses.

Provides a modular Z80 processor with flexible clock and reset options.

The project provides a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. PCB v1.0.0 needs a wire link across C7 when X2 is not populated. Enable only one voltage supervisor in a system.

Adds 128K of Flash ROM and 128K of paged RAM for a CP/M-capable Z80 system.

The project provides Small Computer Monitor S8 firmware, a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. Observe the Flash write-protect jumper and avoid function conflicts with other system memory modules.

Combines a Z80, paged RAM and Flash, clock, reset, and serial terminal on one RCBus module.

The project provides firmware, a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. SC708 has no automatic power-on reset, so press its reset button after applying power. Avoid duplicate CPU, memory, clock, reset, or serial functions when adding it to a modular system.

Adds 512K of Flash ROM and 512K of banked RAM for RomWBW and CP/M.

The project supplies RomWBW and Small Computer Monitor firmware, a schematic, Gerbers, PCB design files, and links for kits and bare PCBs; an assembled version is not offered. It is intended for the SC706 Z80 CPU module and is not compatible with the SC730 CPU plus MMU module. JP1 controls Flash write protection.

Adds CompactFlash storage to RC2014 and RCBus systems at I/O ports 0x10 through 0x17.

Both designs have schematics, Gerbers, PCB files, and kit or bare-PCB paths; assembled versions are not offered. Plain CP/M 2.2 can address the first 128MB and RomWBW up to 2GB. The maker recommends avoiding high-capacity, high-speed cards and documents a critical 5 V power issue with some visually identical CompactFlash adapters.

Adds two clock-stable serial ports using a Z80 SIO/2.

The project supplies a schematic, Gerbers, PCB design files, and links for kits and bare PCBs; an assembled version is not offered. The full interrupt daisy chain and optional bus signals require the 80-pin RCBus or additional wiring as documented.

Adds 16 programmable parallel I/O lines and four handshake lines through a Z80 PIO.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. On PCB v1.0.0, JP2 and JP3 are tight against the P2 box header; the assembly guide recommends filing a little plastic from those headers before soldering.

Adds four programmable counter and timer channels with frequency and interrupt generation.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The optional onboard oscillator is not included in the kit. Mode 2 interrupt chaining needs suitable backplane support or flying leads.

Adds eight 5 V TTL inputs and eight 5 V TTL outputs with state LEDs.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. PCB v1.0.0 leaves insufficient space for C5 to sit tight against the board; this is fixed in PCB v1.0.1.

Adds 512K of RAM and selectable 512K Flash ROM to a 20-bit-address RCBus system.

The project provides Z80 and Z180 firmware, a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. Observe the Flash write-protect jumper and select the ROM/RAM arrangement required by the processor and firmware.

Adds an 18.432 MHz Z180 processor, dual serial ports, and a microSD interface.

The project provides firmware, a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. RomWBW supports the microSD interface, while the documented Small Computer Monitor configuration does not. On PCB v1.0.0 the JP2 RX2 and TX2 labels are swapped; v1.0.1 corrects them.

Combines two Z80 SIO/2 serial ports with four programmable Z80 CTC channels.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The optional oscillator is not included in the kit. Standard RomWBW does not enable CTC support, so its documented jumper setup bypasses the CTC and assumes a 7.3728 MHz CPU clock.

Generates three independently selected clock outputs for RCBus processor and peripheral timing.

The project provides a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. Check every destination jumper to avoid driving a bus clock signal from more than one source.

Adds a battery-backed DS1302 real-time clock and several spare I/O bits.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The clock is supported by RomWBW but not by plain CP/M 2.2 or Small Computer Monitor. Writes to spare output bits require care because the port is shared with the RTC control bits.

Combines a Z80 processor with a 20-bit MMU for SC721's 1 MB linear memory.

The project provides firmware, a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. Pair it with SC721 linear memory and do not combine it with the bank-switching SC707 or SC714 memory modules.

Adds two independently writable pulse-width modulation outputs.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. The base address must be even; 0x04 is the documented example. Pulse frequency is the selected clock divided by 128.

Controls two hobby servos through two tightly decoded output ports.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. Although the servos can use the computer's 5 V rail, the maker strongly recommends an external supply because of loading and electrical-noise concerns.

Adds simple bit-banged microSD storage with RomWBW support.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. Support is included in RomWBW v3.5; RomWBW v3.4 needs SDENABLE enabled in the RCBus_std configuration. Small Computer Monitor does not support it.

Adds a software-enabled 50 Hz system tick interrupt.

The project supplies a schematic, Gerbers, PCB design files, and kit or bare-PCB paths. Interrupt generation is disabled at reset. A jumper routes the signal to /INT, /INT1, or /INT2 where the chosen bus exposes it.

Adds supervised power-on reset, a debounced reset button, and software-triggered reset.

The project provides a schematic, Gerbers, PCB design files, and kit or bare-PCB suppliers; an assembled version is not offered. Enable only one voltage supervisor in a system and choose an I/O address that does not conflict with another module.

Combines a Z80 CPU, 512 KiB Flash, 512 KiB SRAM, clock, reset, and RomWBW paging on one modular card.

Tindie listed the complete Z80-512K kit without an out-of-stock notice on 2026-07-25; complete open files also remain available for both designs. The Z80-CPM store page failed extraction, so no stock claim is made for that variant. Z80-512K builders using its supervisor without a backup battery must short the battery connector as documented.